instruction pointers

["Steve Richter" <srichter@xxxxxxxxxxxxx>]

Instruction pointers are a bit limited in mi.

 

You cannot add to them or setip to a variable label name.

 

This limits the error recovery ability of a pgm.  Implementing "Ignore/Retry/Cancel" as a reply to an unmonitored escape msg is tough to do. Also makes it hard for a debugger to implement "skip an instruction" functionality.

 

I am looking at the risc code of an mi pgm. Here are some branching examples.

 

Branch to label.

    B  label1 ;

 

Risc code:

    B 0X18                  02D 

 

Branch to instruction pointer

    B pLbl ;

 

Risc code:

   LQ 26,0XF2E0(31),2                    032   
   BCLA 12,21,0X8020                           
   LD 3,0X1B0(28)                              
   TXER 0,0,42                                 
   LD 2,0X0(27)                                
   LD 0,0X8(27)                                
   MTSPR 9,2                                   
   TD 24,3,0                                   
   BCCTR 20,0

 

BCCTR is "branch conditional to the address contained in the counter register".

 

It looks like the risc instructions do allow the branching to a variable instruction number. no?

 

Is the counter register 64 bits?

 

Does the powerpc risc have the ability to branch to code in another pgm?  Like a branch to an OMI implemented module of code?

 

Thanks,

Steve Richter