Re: Tagged memory (was Re: Memory Upgrade)

["Steve Richter" <srichter@xxxxxxxxxxxxx>]

> Now if rochester would only enhance its memory protection by enabling a
ptr
> to be limited to an address range, a whole class of typical programming
> errors could be debugged much easier then they are now.
>

This could be done by creating a new 32 or 48 byte "enhanced space ptr".
The extra space would hold the address range of the ptr.

The trusted translator which outputs this code for a standard spcptr
reference:

> > LQ R6, addr  ;  load pointer into R6, R7. set bit in exception reg if no
> tag
> > TXER nn ; trap if no tag

would simply add a few more stmts to test that the ptr value is within its
permitted range.

Just as TXER was an as400 specific add on to the power pc instruction set,
another new instruction to chk the addr range, running parallel to the TXER
instruction, could be created.


Steve Richter