Re: how is system geared down?

["Leif Svalgaard" <leif@xxxxxxxx>]

except that the next version of iSeries might use
VLIW technique and thus microcode a RISC.
It is not strictly true that you can equate
RISC = no microcode
or
CISC = microcode

----- Original Message -----
From: Alexei Pytel <pytel@us.ibm.com>
To: <MIDRANGE-L@midrange.com>
Sent: Wednesday, May 09, 2001 11:09 AM
Subject: Re: how is system geared down?


>
> PowerPC processors are RISC and all RISC processors are hardwired and do
> not have microcode.
>
>     Alexei Pytel
>
> "Pessimist is nothing but a well-informed optimist"
>
>
>
>
>
>                     Larry Bolhuis
>                     <lbolhuis@arbsol.co       To:
MIDRANGE-L@midrange.com
>                     m>                        cc:
>                     Sent by:                  Subject:     Re: how is
system geared down?
>                     owner-midrange-l@mi
>                     drange.com
>
>
>                     05/08/2001 06:58 PM
>                     Please respond to
>                     MIDRANGE-L
>
>
>
>
>
> It's just my instinct telling me this but I suspect that the microcode
> for the 2290 with Northstar is simply inserting the proper number of
> No-Ops instructions to achieve the proper lack of speed.  It's very
> likely that this is based upon some hardware componant so that swapping
> of chips and such is extremely unlikely to have any affect (other than
> the voiding of warranty!)
>
>   The primary reason for the same Processor being used at different
> performance levels is economy of scale-make 10000 of one thing instead
> of 2000 of five different things. They will want the same for the bus,
> the memory DIMMs, IOPs, IOAs, and other hardware componants so making
> them run different speeds also compounds design effort, manufacturing
> effort, spare parts, upgrades etc.
>   Similairly IBM would not want to have to support more different
> microcode componants than they already do (one reason for V5R1 to be
> last version on 400 and 500 models), so it's likely the microcode for
> all Northstar processors is the same and there is some small hardware
> thing in there telling that microcode how fast (or not) to run.  Isolate
> that little bugger and you have found the 'Holy Grail' of iSeries
> performance. (Much like Rusty Wallace often rips out his Rev Limiter
> chip during the race. He just doesn't have to worry about voiding his
> warranty!)
>
>  - Larry
>
> > Steve Richter wrote:
> >
> > Based on the numbers cited in prev msgs:
> >  "the model 170-2160 has a 100 Mhz Apache processor and a CPW rating
> > of 114, while the model 170-2290 has a 200 Mhz Northstar processor and
> > a CPW rating of only 73"
> > it is obvious that the system is being geared down to meet the cpw
> > targets.
> >
> > Does anyone know how, where?
> >
> > Is it slow memory, a slow bus or just a deliberately slowed clock?
> >
> > Are the memory chips used in a power pc rs6000 usable in a power pc
> > as400?
> >
> > What about swapping memory chips between similar model as400s that
> > have different cpw ratings? Any volunteers to do that?
> >
> > Would the performance results of a power pc assembler pgm, patched in
> > using sst, that uses register only operations ( no memory access ) to
> > count to a trillion show the actual clock speed of the cpu?
>
> --
> Larry Bolhuis                  | Cogito ergo mercari iSeries
> Arbor Solutions, Inc.          |
> (616) 451-2500                 |                    (I think, therefore I
> buy iSeries.)
> (616) 451-2571 -fax       |
> lbolhuis@arbsol.com       |        #3  1951-2001
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